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11 March 2016 - Forum Rules

## The Guardian Legend - SRAM Saving Edition

Started by 8.bit.fan, November 06, 2017, 04:28:13 PM

#### SourMesen

Pretty much what KingMike said, except the 2k banks ignore the lowest bit, so you would need to set registers 0 to 5 to be: 0, 2, 4, 5, 6, 7
Which should give a continuous 8kb worth of CHR banks and fix the issue in Mesen.

The 2x 2k + 4x 1k vs 4x 1kb + 2x 2k toggle is bit 7 (\$80) of \$8000.
So this sequence of writes should work:
`\$8000 = \$00\$8001 = \$00\$8000 = \$01\$8001 = \$02\$8000 = \$02\$8001 = \$04\$8000 = \$03\$8001 = \$05\$8000 = \$04\$8001 = \$06\$8000 = \$05\$8001 = \$07`

#### 8.bit.fan

Quote from: KingMike on November 27, 2017, 03:45:02 PM
Isn't CHR banking on MMC3 like
write 0 to 5 to \$8000 to select which of the six CHR regions (2 2K banks plus 4 1KB banks) to bankswap
and then the CHR bank to \$8001?
(and repeat for all 6 banks)

I think there's also a register which chooses which half of PPU tile space (\$0000 or \$1000) uses the 2KB banking (which makes the opposite use the 1KB banking).

If it's a CHR-RAM state you could probably just set it map CHR to banks 0 to 5 in order. Thus the banking size wouldn't matter as long as it's set to something.
Quote from: SourMesen on November 27, 2017, 05:53:26 PM
Pretty much what KingMike said, except the 2k banks ignore the lowest bit, so you would need to set registers 0 to 5 to be: 0, 2, 4, 5, 6, 7
Which should give a continuous 8kb worth of CHR banks and fix the issue in Mesen.

The 2x 2k + 4x 1k vs 4x 1kb + 2x 2k toggle is bit 7 (\$80) of \$8000.
So this sequence of writes should work:
`\$8000 = \$00\$8001 = \$00\$8000 = \$01\$8001 = \$02\$8000 = \$02\$8001 = \$04\$8000 = \$03\$8001 = \$05\$8000 = \$04\$8001 = \$06\$8000 = \$05\$8001 = \$07`
Thanks so much for your help again KingMike and SourMesen! Much appreciated!!
Man my to-do list is getting big! But I'll definitely get to this one when I'm able to find some time!

Cheers!!

8-bit fan
In the year of 200X, a super robot named Mega Man...
http://www.8bitfan.info/
FF4 Ultima Discord: https://discord.gg/4MqjwJt

#### Ripthorn

Does the target ROM must have the CRC FA43146B or I can apply the IPS patch on any NO INTRO Guardian Legend (USA) ROM?
I can't find the ROM with CRC FA43146B, only with CRC C94AC75F. The funny thing is that both files have the same SHA-1, I thought this was not possible.

Anyway, I applied the IPS in the ROM with CRC C94AC75F, it works fine on FCEUX 2.2.3 but no luck on Everdrive N8 (OS v16), just black screen after start game. This happened because of wrong CRC or incompatibility with Everdrive? I would presume the problem is on Everdrive but since @8-bit fan used the Everdrive and does not mention the required CRC on the readme file, I can't really say what went wrong.