armips assembler (v0.7c released!)

[KC]

Update: PSX and GBA/NDS support is done now. You can download it here.

I've worked on this for quite a while now. After multiple rewrites and a longer break, I think it's almost ready to be released. I'm not sure when it will be done, but if everything goes as planned, it should be in the foreseeable future.
It is intended to be a very romhacking friendly assembler for PSX and also GBA/NDS. My main motivation to write this was the lack of virtually any decent assembler for PSX. You can insert and overwrite code into existing files, add cross-references between overlays and insert everything at once.

Currently implemented features:

• full-fledged C-like infix expression parser
• opening any file with any given memory offset. The content is not deleted and only the desired changes are applied. You can create/overwrite a file, too, though
• you can also open multiple files in a row and cross-reference them. This was done in order to support overlays
• local labels that are only valid until the next global label
• table support
• the complete MIPS r3000 instruction set for PSX
• a couple of hard-coded MIPS macros to make writing code easier:
  
  • load immediate: li a0,0xDEADBEEF
  • load/write from/to offset: sw a0,0x80001000
  • unaligned load/store: ush a0,(a1)
  • branches: blt a0,0x100,Start
  • rotate: ror a0,a1,8
• checks for load delay problems. As every load is delayed by 1 cycle, the loaded value is not immediately available. The following code would generate a warning:
     lw   v0,(v0)
     addiu   v0,1h
• also an optional automatic fix for said problem. If enabled, the assembler will insert a nop whenever it encounters such a problem:
     lw   v0,(v0)
     nop
     addiu   v0,1h
• optional output of all the labels to a given text file
• optional output of all the generated code, complete with address in memory and origin, to a given text file
• user defined macros
• THUMB instruction set for GBA and NDS
• complete ARM support for GBA and NDS

Planned features:

• an area directive that takes amaximum size and generates an error if it's overflown
• support for N64 and PS2
  

It would be nice to hear what you think about it, and also further feature requests. I can't guarantee that I will add anything, but I will consider every suggestion.

[RedComet]

Glad this is finally almost ready for release!

Also, didn't anyone else misread the title as "armpits assembler"? >_>

[Nightcrawler]

This sounds great!

Red, I made the same mistake. I think it plays on how when we read, we don't actually read letter by letter, rather we word recognize.

[KC]

I finished adding THUMB support now, with a proper literal pool logic if someone cares. So now only ARM support and some testing remain before I can release a first version.

And yeah, I'm not all that happy with the name either. I'm open for any other suggestions.

[Nightcrawler]

Actually calling it 'Armpits' would certainly get some recognition.

[DaMarsMan]

Any chance you could get full R5900 support in before release?

[scarboy]

This sounds very useful, especially the load delay stuff. It's ridiculous that emulators do not give you a warning if you leave the nop out, especially knowing that it wouldn't work on real hardware.

[golden]

It's going to be an awesome tool, I'm really looking forward to it.

[KC]

Still no release, but I made some progress lately. I added most of the ARM instruction set, and also parts of the PS2 and PSP specific instructions. Still a lot to go, though.

I also added conditional statements and macros, though both probably still need some testing. This piece of code:

Code: [Select]

.macro myli,dest,value
.if value < 0x10000
ori dest,r0,value
.elseif (value & 0xFFFF8000) == 0xFFFF8000
addiu dest,r0,value & 0xFFFF
.elseif (value & 0xFFFF) == 0
lui dest,value >> 16
.else
lui dest,value >> 16 + ((value & 0x8000) != 0)
addiu dest,dest,value & 0xFFFF
.endif
.endmacro

.macro myrolv,destreg,sourcereg,shiftreg
subu r1,r0,shiftreg
srlv r1,sourcereg,r1
sllv destreg,sourcereg,shiftreg
or destreg,r1
.endmacro

myli a1,0FFEE0000h
myli a0,15h
myrolv v0,a1,a0
will assemble to this.

Code: [Select]

lui a1,0xFFEE
ori a0,r0,0x15
subu r1,r0,a0
srlv r1,a1,r1
sllv v0,a1,a0
or v0,r1

[Wareya]

This is leaning towards HLASM now, so watch your code when people start calling it a compiler.

[Klarth]

Speaking of compilers...if you're uber motivated...add this feature (using GCC as an example):

Program some routine in C
Compile using GCC with target r3000a
Add reference to a C function in armips asm file
Insert assembly code generated by GCC
???
PROFIT!

Just use assembly for small mods and add the ability to use C with larger mods...say adding compression.  Maybe somebody would find this useful.

[KC]

I don't think that's worth the trouble. The compiler should be able to output the assembly itself anyway.

[Kajitani-Eizan]

wow, this looks awesome!

[magusneo]

Great!
Will this assembler support cops opcodes likes "swc1,lwc1,add.s" for ps2?
PS2 hacking really needs it.

[KC]

Yes, it will support the whole R5900 instruction set.
However, I can't work on it as much I want to, so everything is going pretty slowly. ARM is at 90%, and about half of the PS2 opcodes are added. But as I don't know how it'll take me to finish these two, I think I will release a PSX-only version first. That alone should already help some people.

[magusneo]

That's really good news!
Currently we have to use gcc-as for ps2 games,but gcc does not suit hacking.
Thanks!

[KC]

Well, here it is. It only includes PSX support, as previously stated, but it should be working well enough. Let me know if there are any errors.
Documentation and an example file are included. I'll submit it to the database later.
http://gemini.aerdan.org/upload/armips_v05b_by_kingcom.zip

[Rocket Science]

[KC]

I finished adding the missing ARM opcodes now, but I still have to thoroughly test them. Some of them are so confusing that the possibility of errors is pretty big. Whoever thought stuff like "mrc p6,5,r4,c3,c2,1" or "smlatbeq r2,r3,r4,r5" was good deserves to be punished hard.
I also discovered that the current release doesn't check if an instruction is valid inside a delay slot or not. That will be fixed in the next version.

[Kronus_Arm]

Will it support MIPSII compatible Ingenic Semiconductor devices?

Thanks!